CCD/EMCCD光电参数测试系统的设计与应用 -

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CCD/EMCCD光电参数测试系统的设计与应用

1.
华东光电集成器件研究所, 江苏苏州 215263
2.
乌克兰科学院V.E. Lashkaryov半导体物理研究所, 乌克兰基辅 01001
3.
乌克兰科学院Bogomoletz生理学研究所, 乌克兰基辅 01001

中图分类号:TN205
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- 被引次数:0
出版历程
- 收稿日期:2023-07-04
- 修回日期:2023-08-11
- 录用日期:2023-08-28
- 网络出版日期:2023-09-12

Design and application of CCD/EMCCD photoelectronic parameter test system

doi:10.37188/CO.EN-2023-0016

1.
East China Institute of Optoelectronic Integrated Devices, Suzhou 215263, China
2.
V.E. Lashkaryov Institute of Semiconductor Physics NAS of Ukraine, Kyiv 01001, Ukraine
3.
Bogomoletz Institute of Physiology of NAS of Ukraine, Kyiv 01001, Ukraine

Funds:Supported by National Science and Technology Major Project from Minster of Science and Technology, China (No. 2018AAA0103100)

More Information

Author Bio:
Shen Ji (1988—), male, born in Haimen, Jiangsu Procince, Master degree, Senior Engineer. He received his master degree form Nanjing University of Science and Technology, Optical Engineering in 2014. He is mainly engaged in research of photoelectric device, module and testing. E-mail:njustshenji@126.com

Corresponding author:njustshenji@126.com

摘要

摘要:
本文开发了一种用于测量CCD和EMCCD（电子倍增CCD）芯片光电参数的测试系统。该测试系统通过自动模式或手动模式间的切换，测量器件的暗电流、读出放大器的响应度、电荷转移效率、电荷容量和其他参数。该测试系统可以针对不同规格和结构的CCD/EMCCD器件，实现CCD晶圆或封装好的成品的参数测试，实现576×288、640×512、768×576、1024×1024、1280×1024 CCD/EMCCD的测试和筛选。
- CCD/
- EMCCD/
- 测试系统/
- 光电参数
Abstract:
A photoelectrical parameters test system for testing CCD and electron-multiplying charge-coupled device (EMCCD) chips is designed. The test system has automatic and manual modes, and it can test the dark currents, the output amplifier’s responsivity, charge transfer efficiency, charge capacity and other parameters. According to different specifications and structures of CCD/EMCCD devices, we complete the parameter test of wafer or packaged product. The developed system can be used for the testing and sorting for 576 × 288, 640 × 512, 768 × 576, 1024 × 1024, 1280 × 1024 CCD and EMCCD chips.
- CCD/
- EMCCD/
- test system/
- photoelectrical parameters

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Figure 1.Block diagram of the entire test system

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Figure 2.The block diagram of the direct and pulse voltage source unit

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Figure 3.Block diagram of the FPGA board

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Figure 4.Block diagram of the device (outlined by a dashed line) implemented in FPGA

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Figure 5.Amplification of DACs output voltages

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Figure 6.High voltage amplifier circuit

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Figure 7.Schematic diagram of the experimental driver on the base of GaN HEMT

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Figure 8.Driver’s power consumption and temperature at different output voltages and loads

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Figure 9.Flow chart for measuring maximum output voltage, charge capacity, and output amplifier responsivity

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Figure 10.Measuring results of test system. Volt-charge responsivity for normal and gain modes, average dark signal, and dependence of gain on R02HV voltage were measured

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Table 1.Parameters of 16 DC channels

Channel quantity	Setting range/ V	Total relative error	Noise, mV/300 kHz
1	−5···+10	typical: ±0.1%; maximal: ±0.5% fromV_max	<0.15
3	0···+15		< 0.15
4	−5···+15		< 0. 20
4	0···+25		< 0.40
4	0···35		< 0.70

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Table 2.Parameters of 16 AC channels

Channel quantity	Setting range/ V	Wave front/ ns	Load (each channel)
3	HL, LL: –5...+10	120..200	up to 24 nF
4	HL: –5...+10 or 0...+15 LL: –5...+10 or 0...+15	< 15	220 pF
1	HL: 0...+15 LL: 0...+15	< 15	220 pF
6	HL: +5 LL: 0	< 5	150 pF
1	HL: –5...+ 15; LL, ML: –5...+10 (three level signal)	120..200	up to 24 nF
1	HL: –5...+45 LL: –5...+ 45 (square or sine wave)	20	100 pF

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Table 3.Electrical parameters of EMCCD matrices measured by the test system

No	Parameter	Range
1	Resistances between the pairs of chip contact pads
2	Average Dark Signal	> 1 e/pixel/s
3	Dark Signal Non-uniformity (DSNU)
4	Multiplication Gain	1～1000
5	Peak Output Voltage (POV)	< 1 V
6	Output Amplifier Responsivity (OAR)	μV/e-
7	Register Charge Handling
8	Electric Charge Transfer Efficiency (CTE)	≤ 0.99995

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Table 4.Measurements example of test system

1.	POV nm, norm mode (max) = 0.177 V;
2.	SC is (saturation charge) = 132151 e`/pixel;
3.	POV hgm, high gain mode (max) = 1.782 V;
4.	CHCgr, Charge Handling Capability of gain register = 1280481 e`/pixel;
5.	White column defects = 3
6.	Dark column defects quantity = 18
7.	Average Dark Signal (U) = 0.002939 V/pixel/s
8.	Average Dark Signal (e`) = 2396 e`/pixel/s
9.	OAR (output amplifier responsivity) = 1.416 uV/e` (NM: 1.226 uV/e`)
10.	Dark signal non-uniformity (DSNU) (rms) = 67.334 %
11.	Charge transfer efficiency (CTE) = 99.908 %

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